The datasheet goes on to say that "the nRESET pin is internally connected to VDD with a pull up resistor of 50 kΩ." So... why are there two options for how to configure the nReset pin when it is not being used? Why not just recommend that it should be left floating (since it is already pulled high internally)? And, if there are indeed technical reasons for when the pin should be externally pulled up to VDD (for better noise immunity, as an example) then let us know what those technical reasons are.
Care should be taken when depaneling the perforated-tab PCB array; otherwise, an incorrect method will splinter or tear the solder-mask or active surface layer. The ideal breakout method should not cause any damage to the board or transfer stress from the PCB surface to the components.
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