Since the finite-impulse-response (FIR) filtering is a common operation in DSP, we will continue our discussion based on examining the difference equation of an FIR filter. This simple example will show the typical properties of many DSP algorithms. After reviewing the problem of handling the incoming samples, we will discuss the circular buffering as an efficient solution to the problem.
I always prefer to maintain a logical flow of signals and functionality in my PCB layouts. I think that this approach results in an easier design process and a better board. The AWG layout progresses from left to right: from power input and communication input/output, to the power supply circuitry, to the processor, to the DAC (which is controlled by the processor and constitutes the board’s transition from digital to analog), to the analog signal-conditioning circuitry, and finally to the output connector. Parts that don’t have a specific position in the functional flow—such as the oscillator (U4), the DAC’s passives (C16, R5, etc.), and the voltage reference (U3)—are arranged near the components that they support.
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