You can also see that I’ve made it very easy for heat to move away from the regulator (U1) and into the ambient environment or into other portions of the PCB. U1’s thermal tab is connected to a large copper pour, and this copper pour is shot through with vias that conduct heat down to the internal ground plane. If I were really worried about thermal issues I could also connect these vias to a copper pour on the bottom side of the board, but in this case, it would have been total overkill.
The decoupling capacitors (C4, C5, C6, C7, C9, C10, C11) are arranged around the perimeter of the chip, very close to their respective power pins and to the vias that connect the caps to the internal planes. Notice how the smaller cap is always closer to the power pin; this is because we rely more on the lower-value capacitor for high-frequency bypassing, and thus the first priority is minimizing the inductance and resistance between the smaller cap and the pin.
Nolanwebdev - Wiring Diagram Images Collection
Copyright © 2003 - 2018 Domain Media. All sponsored products, company names, brand names, trademarks and logos arethe property of their respective owners.